Browsing by author "Mitsuhashi, Riichirou"
Now showing items 1-20 of 21
-
45nm LSTP FET with FUSI gate on PVD-HfO2 with excellent drivability by advanced PDA treatment
Mitsuhashi, Riichirou; Yamamoto, Kazuhiko; Hayashi, S.; Rothschild, Aude; Kubicek, Stefan; Veloso, Anabela; Van Elshocht, Sven; Jurczak, Gosia; De Gendt, Stefan; Biesemans, Serge; Niwa, M. (2005) -
A Dy2O3-capped HfO2 dielectric and TaCx-based metals enabling low-Vt single-metal-single-dielectric gate stack
Chang, Vincent; Ragnarsson, Lars-Ake; Pourtois, Geoffrey; O'Connor, Robert; Adelmann, Christoph; Van Elshocht, Sven; Delabie, Annelies; Swerts, Johan; Van der Heyden, Nikolaas; Conard, Thierry; Cho, Hag-Ju; Akheyar, Amal; Mitsuhashi, Riichirou; Witters, Thomas; O'Sullivan, Barry; Pantisano, Luigi; Rohr, Erika; Lehnen, Peer; Kubicek, Stefan; Schram, Tom; De Gendt, Stefan; Absil, Philippe; Biesemans, Serge (2007) -
Achieving 9ps unloaded ring oscillator delay in FuSI/HfSiON with 0.8 nm EOT
Rothschild, Aude; Shi, Xiaoping; Everaert, Jean-Luc; Kerner, Christoph; Chiarella, Thomas; Hoffmann, Thomas; Vrancken, Christa; Shickova, Adelina; Yoshinao, H.; Mitsuhashi, Riichirou; Niwa, Masaaki; Lauwers, Anne; Veloso, Anabela; Kittl, Jorge; Absil, Philippe; Biesemans, Serge (2007) -
Achieving low VT Ni-FUSI CMOS via lanthanide incorporation in the gate stack
Veloso, Anabela; Yu, HongYu; Lauwers, Anne; Chang, Shou-Zen; Adelmann, Christoph; Onsia, Bart; Demand, Marc; Brus, Stephan; Vrancken, Christa; Singanamalla, Raghunath; Lehnen, Peer; Kittl, Jorge; Kauerauf, Thomas; Vos, Rita; O'Sullivan, Barry; Van Elshocht, Sven; Mitsuhashi, Riichirou; Whittemore, G.; Yin, K.M.; Niwa, Masaaki; Hoffmann, Thomas; Absil, Philippe; Jurczak, Gosia; Biesemans, Serge (2007-09) -
Achieving low-VT Ni-FUSI CMOS via Lanthanide incorporation in the gate stack
Veloso, Anabela; Yu, HongYu; Lauwers, Anne; Chang, Shou-Zen; Adelmann, Christoph; Onsia, Bart; Demand, Marc; Brus, Stephan; Vrancken, Christa; Singanamalla, Raghunath; Lehnen, Peer; Kittl, Jorge; Kauerauf, Thomas; Vos, Rita; O'Sullivan, Barry; Van Elshocht, Sven; Mitsuhashi, Riichirou; Whittemore, G.; Yin, K.M.; Niwa, Masaaki; Hoffmann, Thomas; Absil, Philippe; Jurczak, Gosia; Biesemans, Serge (2008) -
CMOS integration of dual work function phase controlled Ni FUSI with simultaneous integration of nMOS (NiSi) and pMOS (Ni-rich silicide) gates on HfSiON
Lauwers, Anne; Veloso, Anabela; Hoffmann, Thomas Y.; Van Dal, Mark; Vrancken, Christa; Brus, Stephan; Locorotondo, Sabrina; de Marneffe, Jean-Francois; Sijmus, Bram; Kubicek, Stefan; Chiarella, Thomas; Kmieciak, Malgorzata; Opsomer, Karl; Niwa, Masaaki; Mitsuhashi, Riichirou; Kottantharayil, Anil; Yu, HongYu; Demeurisse, Caroline; Verbeeck, Rita; de Potter de ten Broeck, Muriel; Absil, Philippe; Maex, Karen; Jurczak, Gosia; Biesemans, Serge; Kittl, Jorge (2005-12) -
Current status and addressing the challenges of Hf-based gate stack toward 45nm-LSTP application
Niwa, Masaaki; Mitsuhashi, Riichirou; Yamamoto, K.; Hayashi, S.; Harada, Yoshinao; Rothschild, Aude; Hoffmann, Thomas Y.; Kubicek, Stefan; De Gendt, Stefan; Heyns, Marc; Biesemans, Serge; Kubota, M. (2005-10) -
Defect profiling and the role of nitrogen in lanthanum oxide-capped high-k dielectrics for nMOS applications
O'Sullivan, Barry; Mitsuhashi, Riichirou; Okawa, Hiroshi; Sengoku, Naohisa; Schram, Tom; Groeseneken, Guido; Biesemans, Serge; Nakabayashi, Takashi; Ikeda, Atsushi; Niwa, Masaaki (2008-09) -
Demonstration of metal-gated low Vt n-MOSFETs using a Poly-Si/TaN/Dy2O3/SiON gate stack with a scaled EOT value
Yu, HongYu; Singanamalla, Raghunath; Ragnarsson, Lars-Ake; Chang, Vincent; Cho, Hag-Ju; Mitsuhashi, Riichirou; Adelmann, Christoph; Van Elshocht, Sven; Lehnen, Peer; Chang, Shou-Zen; Yin, K.M.; Schram, Tom; Kubicek, Stefan; De Gendt, Stefan; Absil, Philippe; De Meyer, Kristin; Biesemans, Serge (2007) -
Low VT CMOS using doped Hf-based oxides, TaC-based metals and laser-only anneal
Kubicek, Stefan; Schram, Tom; Paraschiv, Vasile; Vos, Rita; Demand, Marc; Adelmann, Christoph; Witters, Thomas; Nyns, Laura; Ragnarsson, Lars-Ake; Yu, HongYu; Veloso, Anabela; Singanamalla, Raghunath; Kauerauf, Thomas; Rohr, Erika; Brus, Stephan; Vrancken, Christa; Chang, Vincent; Mitsuhashi, Riichirou; Akheyar, Amal; Cho, Hag-Ju; Hooker, Jacob; O'Sullivan, Barry; Chiarella, Thomas; Kerner, Christoph; Delabie, Annelies; Van Elshocht, Sven; De Meyer, Kristin; De Gendt, Stefan; Absil, Philippe; Hoffmann, Thomas Y.; Biesemans, Serge (2007) -
Low Vt Ni-FUSI CMOS technology using a DyO cap layer with either single or dual Ni-phases
Yu, HongYu; Chang, Shou-Zen; Veloso, Anabela; Lauwers, Anne; Adelmann, Christoph; Onsia, Bart; Van Elshocht, Sven; Singanamalla, Raghunath; Demand, Marc; Vos, Rita; Kauerauf, Thomas; Brus, Stephan; Shi, Xiaoping; Kubicek, Stefan; Vrancken, Christa; Mitsuhashi, Riichirou; Lehnen, Peer; Kittl, Jorge; Niwa, M.; Yin, K.M.; Hoffmann, Thomas; De Gendt, Stefan; Jurczak, Gosia; Absil, Philippe; Biesemans, Serge (2007) -
Ni-FUSI on high-k as a candidate for 65nm LSTP CMOS
Kubicek, Stefan; Veloso, Anabela; Kottantharayil, Anil; Hayashi, Shigenori; Yamamoto, Kazuhiko; Mitsuhashi, Riichirou; Kittl, Jorge; Lauwers, Anne; Horii, S.; Harada, Y.; Kubota, M.; Niwa, Masaaki; De Gendt, Stefan; Heyns, Marc; Jurczak, Gosia; Biesemans, Serge (2005-04) -
Nitrogen profile and dielectric cap layer (Al2O3, Dy2O3, La2O3) engineering on Hf-silicate
Cho, Hag-Ju; Yu, HongYu; Ragnarsson, Lars-Ake; Chang, Vincent; Schram, Tom; O'Sullivan, Barry; Kubicek, Stefan; Mitsuhashi, Riichirou; Akheyar, Amal; Van Elshocht, Sven; Witters, Thomas; Delabie, Annelies; Adelmann, Christoph; Rohr, Erika; Singanamalla, Raghunath; Chang, Shou-Zen; Swerts, Johan; Lehnen, Peer; De Gendt, Stefan; Absil, Philippe; Biesemans, Serge (2007) -
Optimization of HfSiON using a design of experiment (DOE) approach
Rothschild, Aude; Mitsuhashi, Riichirou; Kerner, Christoph; Shi, Xiaoping; Everaert, Jean-Luc; Date, Lucien; Conard, Thierry; Richard, Olivier; Vrancken, Evi; Verbeeck, Rita; Veloso, Anabela; Lauwers, Anne; de Potter de ten Broeck, Muriel; Debusschere, Ingrid; Jurczak, Gosia; Niwa, Masaaki; Absil, Philippe; Biesemans, Serge (2007) -
Oxygen-vacancy-induced Vt shift in La-containing devices
O'Sullivan, Barry; Mitsuhashi, Riichirou; Pourtois, Geoffrey; Chang, Vincent; Adelmann, Christoph; Schram, Tom; Ragnarsson, Lars-Ake; Van der Heyden, Nikolaas; Cho, Hag-Ju; Harada, Y.; Veloso, Anabela; O'Connor, Robert; Pantisano, Luigi; Yu, HongYu; Groeseneken, Guido; Absil, Philippe; Biesemans, Serge; Ikeda, Atsushi; Niwa, Masaaki (2007) -
Prospect of Hf-based gate dielectric by PVD with FUSI gate for LSTP application
Niwa, Masaaki; Mitsuhashi, Riichirou; Yamamoto, Kazuhiko; Hayashi, S.; Harada, Y.; Kubota, M.; Rothschild, Aude; Hoffmann, Thomas Y.; Kubicek, Stefan; De Gendt, Stefan; Heyns, Marc; Biesemans, Serge (2005) -
PVD-HfSiON gate dielectrics with Ni-FUSI electrode for 65nm LSTP application
Yamamoto, Kazuhiko; Kubicek, Stefan; Rothschild, Aude; Mitsuhashi, Riichirou; Deweerd, Wim; Veloso, Anabela; Jurczak, Gosia; Biesemans, Serge; De Gendt, Stefan; Wickramanayaka, S.; Hayashi, S.; Niwa, Masaaki (2005-06) -
Reliability study of La2O3 capped HfSiON high-permittivity n-type metal-oxide-semiconductor field-effect transistor devices with tantalum-rich electrodes
O'Sullivan, Barry; Mitsuhashi, Riichirou; Pourtois, Geoffrey; Aoulaiche, Marc; Houssa, Michel; Van der Heyden, Nikolaas; Schram, Tom; Harada, Yoshinao; Groeseneken, Guido; Absil, Philippe; Biesemans, Serge; Nakabayashi, Takashi; Ikeda, Atsushi; Niwa, Masaaki (2008) -
Strain enhanced FUSI/HfSiON technology with optimized CMOS process window
Veloso, Anabela; Verheyen, Peter; Vos, Rita; Brus, Stephan; Ito, Satoru; Mitsuhashi, Riichirou; Paraschiv, Vasile; Shi, Xiaoping; Onsia, Bart; Arnauts, Sophia; Loo, Roger; Lauwers, Anne; Conard, Thierry; de Marneffe, Jean-Francois; Goossens, Danny; Baute, Debbie; Locorotondo, Sabrina; Chiarella, Thomas; Kerner, Christoph; Vrancken, Christa; Mertens, Sofie; O'Sullivan, Barry; Yu, HongYu; Chang, Shou-Zen; Niwa, Masaaki; Kittl, Jorge; Absil, Philippe; Jurczak, Gosia; Hoffmann, Thomas Y.; Biesemans, Serge (2007) -
Strain enhanced Low-VT CMOS featuring La/Al-doped HfSiO/TaC and 10ps invertor delay
Kubicek, Stefan; Schram, Tom; Rohr, Erika; Paraschiv, Vasile; Vos, Rita; Demand, Marc; Adelmann, Christoph; Witters, Thomas; Nyns, Laura; Delabie, Annelies; Ragnarsson, Lars-Ake; Chiarella, Thomas; Kerner, Christoph; Mercha, Abdelkarim; Parvais, Bertrand; Aoulaiche, Marc; Ortolland, Claude; Yu, HongYu; Veloso, Anabela; Witters, Liesbeth; Singanamalla, Raghunath; Kauerauf, Thomas; Brus, Stephan; Vrancken, Christa; Chang, V.S.; Chang, Shou-Zen; Mitsuhashi, Riichirou; Okuno, Yasutoshi; Akheyar, Amal; Cho, Hag-Ju; Hooker, J.; O'Sullivan, Barry; Van Elshocht, Sven; De Meyer, Kristin; Jurczak, Gosia; Absil, Philippe; Biesemans, Serge; Hoffmann, Thomas Y. (2008)