Browsing by author "Cho, Moon Ju"
Now showing items 41-60 of 110
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Impact of multi-gate device architectures on digital and analog circuits and its implications on system-on-chip technologies
Thean, Aaron; Wambacq, Piet; Lee, Jae Woo; Cho, Moon Ju; Veloso, Anabela; Sasaki, Yuichiro; Chiarella, Thomas; Miyaguchi, Kenichi; Parvais, Bertrand; Garcia Bardon, Marie; Schuddinck, Pieter; Kim, Min-Soo; Horiguchi, Naoto; Dehan, Morin; Mercha, Abdelkarim; Van der Plas, Geert; Collaert, Nadine; Verkest, Diederik (2013) -
Impact of off state stress on advanced high-K metal gate NMOSFETs
Spessot, Alessio; Aoulaiche, Marc; Cho, Moon Ju; Franco, Jacopo; Schram, Tom; Ritzenthaler, Romain; Kaczer, Ben (2014) -
Impact of the effective work function gate metal on the low-frequency noise of gate-all-around Silicon-on-Insulator NWFETs
Fang, Wen; Veloso, Anabela; Simoen, Eddy; Cho, Moon Ju; Collaert, Nadine; Thean, Aaron; Luo, Jun; Zhao, Chao; Ye, T.; Claeys, Cor (2016) -
Impact of the substrate orientation on CHC reliability in n-FinFETs – separation of the various contributions
Tallarico, Andrea N.; Cho, Moon Ju; Franco, Jacopo; Ritzenthaler, Romain; Togo, Mitsuhiro; Horiguchi, Naoto; Groeseneken, Guido; Crupi, Felice (2014) -
Improved channel hot carrier reliability in p-FinFETs with replacement metal gate by a nitrogen post deposition anneal process
Cho, Moon Ju; Arimura, Hiroaki; Lee, Jae Woo; Kaczer, Ben; Veloso, Anabela; Boccardi, Guillaume; Ragnarsson, Lars-Ake; Kauerauf, Thomas; Horiguchi, Naoto; Groeseneken, Guido (2014-03) -
Improved NBTI reliability with sub 1-nanometer EOT ZrO2 compared to HfO2 gate dielectric
Cho, Moon Ju; Kaczer, Ben; Kauerauf, Thomas; Ragnarsson, Lars-Ake; Groeseneken, Guido (2013) -
Improvements of NBTI Reliability in SiGe p-FETs
Franco, Jacopo; Kaczer, Ben; Cho, Moon Ju; Eneman, Geert; Groeseneken, Guido; Grasser, Tibor (2010-05) -
Increase in oxide trap density due to the implementation of high-k and Al2O3 cap layers in thick-oxide input-output transistors for DRAM applications
Simoen, Eddy; Ritzenthaler, Romain; Cho, Moon Ju; Schram, Tom; Horiguchi, Naoto; Aoulaiche, Marc; Spessot, Alessio; Fazan, Pierre; Claeys, Cor (2015) -
Insight into negative and positive bias temperature instability (N/PBTI) mechanism
Cho, Moon Ju; Lee, Jae-Duk; Aoulaiche, Marc; Kaczer, Ben; Roussel, Philippe; Kauerauf, Thomas; Degraeve, Robin; Franco, Jacopo; Ragnarsson, Lars-Ake; Groeseneken, Guido (2012) -
Interface trap characterization of a 5.8-Å EOT p-MOSFET using high frequency on-chip ring oscillator charge pumping technique
Cho, Moon Ju; Kaczer, Ben; Aoulaiche, Marc; Degraeve, Robin; Roussel, Philippe; Franco, Jacopo; Kauerauf, Thomas; Ragnarsson, Lars-Ake; Hoffmann, Thomas Y.; Groeseneken, Guido (2011-10) -
Interface/bulk trap recovery after submeltl aser anneal and the impact to NBTI reliability
Cho, Moon Ju; Aoulaiche, Marc; Degraeve, Robin; Ortolland, Claude; Kauerauf, Thomas; Kaczer, Ben; Roussel, Philippe; Hoffmann, Thomas Y.; Groeseneken, Guido (2010) -
Interpretation of PBTI/ TDDB predicted lifetime based on trap characterization by TSCIS in Vth-adjusted transistors
Sahhaf, Sahar; Degraeve, Robin; Srividya, Vidya; Cho, Moon Ju; Kauerauf, Thomas; Groeseneken, Guido (2010) -
Investigation of correlated trap sites in SILC, BTI and RTN in SiON and HKMG devices
Bury, Erik; Degraeve, Robin; Cho, Moon Ju; Kaczer, Ben; Goes, Wolfang; Grasser, Tibor; Groeseneken, Guido (2014) -
Investigation of spatial and energetic trap distributions in 1 nm EOT SiO2/HfO2 by discharging-sweep mode amplitude charge pumping
Chung, Eun-Ae; Nam, Kab-Jin; Kim, Young-Pil; Min, Ji-Young; Cho, Moon Ju; Hong, Hyungseok; Han, Jeong; Lee, Jae-Duk; Shin, Yu-Gyun; Choi, Siyoung; Kim, Sangsig (2011) -
Ion-implantation-based low-cost Hk/MG process for CMOS low-power application
Ortolland, Claude; Sahhaf, Sahar; Srividya, Vidya; Degraeve, Robin; Saino, Kanta; Kim, Chul-Sung; Gilbert, Matthieu; Kauerauf, Thomas; Cho, Moon Ju; Dehan, Morin; Schram, Tom; Togo, Mitsuhiro; Horiguchi, Naoto; Groeseneken, Guido; Biesemans, Serge; Absil, Philippe; Vandervorst, Wilfried; Gealy, Dan; Hoffmann, Thomas Y. (2010) -
Low frequency noise analysis for post-treatment of replacement metal gate FinFET
Lee, Jae Woo; Simoen, Eddy; Veloso, Anabela; Cho, Moon Ju; Arimura, Hiroaki; Boccardi, Guillaume; Ragnarsson, Lars-Ake; Chiarella, Thomas; Horiguchi, Naoto; Thean, Aaron; Groeseneken, Guido (2013) -
Low-frequency noise assessment of border traps in Al2O3 capped DRAM peripheral MOSFETs
Simoen, Eddy; Federico, Antonio; Aoulaiche, Marc; Ritzenthaler, Romain; Schram, Tom; Arimura, Hiroaki; Cho, Moon Ju; Kauerauf, Thomas; Groeseneken, Guido; Horiguchi, Naoto; Thean, Aaron; Crupi, Felice; Spessot, Alessio; Caillat, Chirstian; Fazan, Pierre; Na, Hoon Joo; Son, Yunik; Noh, Kyung Bong (2014) -
Low-frequency noise assessment of the oxide trap density in thick-oxide input-output transistors for DRAM applications
Simoen, Eddy; Ritzenthaler, Romain; Cho, Moon Ju; Schram, Tom; Horiguchi, Naoto; Aoulaiche, Marc; Spessot, Alessio; Fazan, Pierre; Claeys, Cor (2016) -
Maximizing reliable performance of CMOS applications–A comprehensive study of FPGA pass gates
Kaczer, Ben; Chen, Chris; Weckx, Pieter; Roussel, Philippe; Toledano Luque, Maria; Franco, Jacopo; Cho, Moon Ju; Watt, Jeff; Chanda, Kaushik; Groeseneken, Guido; Grasser, Tibor (2014) -
Negative Bias Temperature Instability (NBTI) in p-FinFETs with 45-degree substrate rotation
Cho, Moon Ju; Ritzenthaler, Romain; Krom, Raymond; Higuchi, Yuichi; Kaczer, Ben; Chiarella, Thomas; Boccardi, Guillaume; Togo, Mitsuhiro; Horiguchi, Naoto; Kauerauf, Thomas; Groeseneken, Guido (2013)