Browsing by author "Boemmels, Juergen"

Buried Power Rail Integration for CMOS Scaling beyond the 3 nm Node

Gupta, Anshul; Tao, Zheng; Radisic, Dunja; Mertens, Hans; Varela Pedreira, Olalla; Demuynck, Steven; Boemmels, Juergen; Devriendt, Katia; Heylen, Nancy; Wang, Shouhua; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Subramanian, Sujith; Schleicher, Filip; Peter, Antony; Rassoul, Nouredine; Siew, Yong Kong; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; Capogreco, Elena; Mannaert, Geert; Sepulveda Marquez, Alfonso; Dupuy, Emmanuel; Vandersmissen, Kevin; Chehab, Bilal; Murdoch, Gayle; Altamirano Sanchez, Efrain; Biesemans, Serge; Tokei, Zsolt; Dentoni Litta, Eugenio; Horiguchi, Naoto (2022)

Buried power rail integration with FinFETs for ultimate CMOS scaling

Gupta, Anshul; Varela Pedreira, Olalla; Arutchelvan, Goutham; Zahedmanesh, Houman; Devriendt, Katia; Hanssen, Frederik; Tao, Zheng; Ritzenthaler, Romain; Wang, Shouhua; Radisic, Dunja; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Subramanian, Sujith; Schleicher, Filip; Hopf, Toby; Peter, Antony; Rassoul, Nouredine; Debruyn, Haroen; Demonie, Ingrid; Siew, Yong Kong; Chiarella, Thomas; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; De Keersgieter, An; Capogreco, Elena; Dentoni Litta, Eugenio; Boccardi, Guillaume; Baudot, Sylvain; Mannaert, Geert; Bontemps, Noemie; Sepulveda Marquez, Alfonso; Mertens, Sofie; Kim, Min-Soo; Dupuy, Emmanuel; Vandersmissen, Kevin; Paolillo, Sara; Cousserier, Joris; Yakimets, Dmitry; Lazzarino, Frederic; Chehab, Bilal; Favia, Paola; Drijbooms, Chris; Jaysankar, Manoj; Morin, Pierre; Altamirano Sanchez, Efrain; Mitard, Jerome; Wilson, Chris; Holsteyns, Frank; Boemmels, Juergen; Demuynck, Steven; Tokei, Zsolt; Horiguchi, Naoto (2020)

Buried Power Rail Integration with Si FinFETs for CMOS Scaling beyond the 5 nm Node

Gupta, Anshul; Mertens, Hans; Tao, Zheng; Demuynck, Steven; Boemmels, Juergen; Arutchelvan, Goutham; Devriendt, Katia; Varela Pedreira, Olalla; Ritzenthaler, Romain; Wang, Shouhua; Radisic, Dunja; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Zahedmanesh, Houman; Subramanian, Sujith; Schleicher, Filip; Hopf, Toby; Peter, Antony; Rassoul, Nouredine; Debruyn, Haroen; Demonie, Ingrid; Siew, Yong Kong; Chiarella, Thomas; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; De Keersgieter, An; Capogreco, Elena; Dentoni Litta, Eugenio; Boccardi, Guillaume; Baudot, Sylvain; Mannaert, Geert; Bontemps, N.; Sepulveda Marquez, Alfonso; Mertens, Sofie; Kim, Min Soo; Dupuy, Emmanuel; Vandersmissen, Kevin; Paolillo, Sara; Yakimets, Dmitry; Chehab, Bilal; Favia, Paola; Drijbooms, Chris; Cousserier, Joris; Jaysankar, Manoj; Lazzarino, Frederic; Morin, Pierre; Altamirano Sanchez, Efrain; Mitard, Jerome; Wilson, Chris; Holsteyns, Frank; Tokei, Zsolt; Horiguchi, Naoto (2020)

Buried Power Rail Scaling and Metal Assessment for the 3 nm Node and Beyond

Gupta, Anshul; Varela Pedreira, Olalla; Tao, Zheng; Mertens, Hans; Radisic, Dunja; Jourdan, Nicolas; Devriendt, Katia; Heylen, Nancy; Wang, Shouhua; Chehab, Bilal; Jang, Doyoung; Hellings, Geert; Sebaai, Farid; Lorant, Christophe; Teugels, Lieve; Peter, Antony; Chan, BT; Schleicher, Filip; Demonie, Ingrid; Marien, Philippe; Sepulveda Marquez, Alfonso; Richard, Olivier; Nagesh, Nishanth; Lesniewska, Alicja; Lazzarino, Frederic; Ryckaert, Julien; Morin, Pierre; Altamirano Sanchez, Efrain; Murdoch, Gayle; Boemmels, Juergen; Demuynck, Steven; Na, Myung Hee; Tokei, Zsolt; Biesemans, Serge; Dentoni Litta, Eugenio; Horiguchi, Naoto (2020)

Challenges and opportunities for vertical nanowire FETs: device design and fabrication

Veloso, Anabela; Matagne, Philippe; Huynh Bao, Trong; Eneman, Geert; Loo, Roger; Wostyn, Kurt; Brus, Stephan; Boemmels, Juergen; Mocuta, Dan; Ryckaert, Julien (2018)

Challenges for scaled damascene interconnects

Armini, Silvia; Swerts, Johan; Siew, Yong Kong; Vereecken, Philippe; Boemmels, Juergen; Struyf, Herbert; Tokei, Zsolt (2013)

Circuit and process co-design with vertical gate-all-around nanowire FET technology to extend CMOS scaling for 5nm and beyond technologies

Huynh Bao, Trong; Yakimets, Dmitry; Ryckaert, Julien; Ciofi, Ivan; Baert, Rogier; Veloso, Anabela; Boemmels, Juergen; Collaert, Nadine; Roussel, Philippe; Demuynck, Steven; Raghavan, Praveen; Mercha, Abdelkarim; Tokei, Zsolt; Verkest, Diederik; Thean, Aaron; Wambacq, Piet (2014-09)

CMOS area scaling and the need for high aspect ratio vias

Briggs, Basoene; Guissi, Sofiane; Wilson, Chris; Ryckaert, Julien; Paolillo, Sara; Vandersmissen, Kevin; Versluijs, Janko; Lorant, Christophe; Heylen, Nancy; Boemmels, Juergen; Tokei, Zsolt; Sherazi, Yasser; Weckx, Pieter; Kljucar, Luka; van der Veen, Marleen; Boccardi, Guillaume; De Heyn, Vincent; Gupta, Anshul; Ervin, Joseph; Kamon, Matt (2018)

CMOS technology development vehicle for bulk FinFET N10/N7

Dehan, Morin; Boemmels, Juergen; Horiguchi, Naoto; Van der Plas, Geert (2013)

Cobalt bottom-up contact and via prefill enabling advanced logic and DRAM technologies

van der Veen, Marleen; Vandersmissen, Kevin; Dictus, Dries; Demuynck, Steven; Liu, Ran; Bin, Xiaomin; Nalla, Praveen; Lesniewska, Alicja; Hall, Laurie; Croes, Kristof; Zhao, Larry; Boemmels, Juergen; Kolics, Artur; Tokei, Zsolt (2015)

Conformal Cu electroless seed on Co and Ru liners enables Cu fill by plating for advanced interconnects

van der Veen, Marleen; Inoue, Fumihiro; Vandersmissen, Kevin; Dictus, Dries; Tanaka, Tetsu; Boemmels, Juergen; Struyf, Herbert; Tokei, Zsolt (2016)

Constant voltage electromigration for advanced BEOL copper interconnects

Tang, Baojun; Croes, Kristof; Jourdain, Anne; Boemmels, Juergen; Tokei, Zsolt; De Wolf, Ingrid; Wilcox, Eric; McMullen, Timothy (2015)

Contact module at dense gate pitch technology challenges

Demuynck, Steven; Mao, Ming; Kunnen, Eddy; Versluijs, Janko; Croes, Kristof; Wu, Chen; Schaekers, Marc; Peter, Antony; Kauerauf, Thomas; Teugels, Lieve; Boemmels, Juergen (2014)

Correlation between field dependent electrical conduction and dielectric breakdown in a SiOCH based low-k (k=2.0) dielectric

Wu, Chen; Li, Yunlong; Barbarin, Yohan; Ciofi, Ivan; Croes, Kristof; Boemmels, Juergen; De Wolf, Ingrid; Tokei, Zsolt (2013)

Correlation between stress-induced leakage current and dielectric degradation in ultra-porous SiOCH low-k materials

Wu, Chen; Li, Yunlong; Lesniewska, Alicja; Varela Pedreira, Olalla; de Marneffe, Jean-Francois; Ciofi, Ivan; Verdonck, Patrick; Baklanov, Mikhaïl; Boemmels, Juergen; De Wolf, Ingrid; Tokei, Zsolt; Croes, Kristof (2015)

Cryogenic etching vs P4 approaches: paths towards ultra-low damage integration of mesoporous oxide dielectric materials

de Marneffe, Jean-Francois; Zhang, Liping; Heyne, Markus; Krishtab, Mikhail; Goodyear, Andy; Cooke, Mike; Heylen, Nancy; Ciofi, Ivan; Wen, Liang Gong; Wilson, Chris; Rutigliani, Vito; Decoster, Stefan; Savage, Travis; Matsunaga, Koichi; Nafus, Kathleen; Boemmels, Juergen; Tokei, Zsolt; Baklanov, Mikhaïl (2014)