Browsing by Author "Chang, Shou-Zen"

Achieving low VT Ni-FUSI CMOS via lanthanide incorporation in the gate stack

Achieving low-VT Ni-FUSI CMOS via Lanthanide incorporation in the gate stack

Application of combinatorial methodologies for work function engineering of metal gate/high-k advanced gate stacks

Cost effective low Vt Ni-FUSI CMOS on SiON by means of Al implant (pMOS) and Yb+P implant (nMOS)

Demonstration of low Vt Ni-FUSI N-MOSFETs with SiON dielectrics by using a Dy2O3 cap layer

Demonstration of metal-gated low Vt n-MOSFETs using a Poly-Si/TaN/Dy2O3/SiON gate stack with a scaled EOT value

Demonstration of phase-controlled Ni-FUSI CMOSFETs employing SiON dielectrics capped with sub-monolayer ALD HfSiON for low power applications

Electrical properties of low-VT metal-gated n-MOSFETs using La2O3/SiOx as interfacial layer between HfLaO high-k dielectrics and Si channel

Low VT metal-gate/high-k nMOSFETs - PBTI dependence and VT tune-ability on La/Dy-capping layer locations and laser annealing conditions

Low Vt Ni-FUSI CMOS technology using a DyO cap layer with either single or dual Ni-phases

Modulation of the effective work function of fully-silicided (FUSI) gate stacks

Nitrogen profile and dielectric cap layer (Al2O3, Dy2O3, La2O3) engineering on Hf-silicate

Novel process to pattern selectively dual dielectric capping layers using soft-mask only

Strain enhanced FUSI/HfSiON technology with optimized CMOS process window

Strain enhanced Low-VT CMOS featuring La/Al-doped HfSiO/TaC and 10ps invertor delay

The application of an ultra-thin ALD HfSiON cap layer on SiON dielectrics for Ni-FUSI CMOS technology targeting at low power applications

Transistor threshold voltage modulation by Dy2O3 rare-earth oxide capping: The role of bulk dielectrics charge

Understanding and prediction of EWF modulation induced by various dopants in the gate stack for a gate-first integration scheme