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Browsing by Author "Togo, Mitsuhiro"

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    1/f noise analysis of replacement metal gate bulk p-type fin field effect transistor

    Lee, Jae Woo
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    Cho, Moon Ju
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    Simoen, Eddy  
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    Ritzenthaler, Romain  
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    Togo, Mitsuhiro
    Journal article
    2013-03, Applied Physics Letters, (102) 7, p.73503
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    Atom probe tomography for 3D-dopant analysis in FinFET devices

    Kambham, Ajay Kumar
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    Zschaetzsch, Gerd
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    Sasaki, Yuichiro
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    Togo, Mitsuhiro
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    Horiguchi, Naoto  
    Proceedings paper
    2012, Symposium on VLSI Technology - VLSIT, 12/06/2012, p.77-78
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    Bulk FinFET fabrication with new approaches for oxide topography control using dry removal techniques

    Redolfi, Augusto  
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    Kubicek, Stefan  
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    Rooyackers, Rita
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    Kim, Min-Soo  
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    Sleeckx, Erik  
    Journal article
    2012, Solid-State Electronics, 71, p.106-112
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    Bulk FinFET fabrication with new approaches for oxide topography control using dry removal techniques

    Redolfi, Augusto  
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    Sleeckx, Erik  
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    Devriendt, Katia  
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    Shamiryan, Denis
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    Vandeweyer, Tom  
    Proceedings paper
    2011-03, 12th International Conference on Ultimate Integration on Silicon - ULIS, 14/03/2011, p.31-33
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    Charge based compact modeling for bulk FinFETs

    Cerdeira, Antonio
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    Estrada, Magali
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    Ritzenthaler, Romain  
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    Franco, Jacopo  
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    Togo, Mitsuhiro
    Proceedings paper
    2012, 8th International Caribbean Conference on Devices, Circuts and Systems - ICCDCS, 14/03/2012
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    Charge based DC compact modeling of bulk FinFET transistor

    Cerdeira, Antonio
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    Garduno, Ivan
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    Tinoco, Julio
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    Ritzenthaler, Romain  
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    Franco, Jacopo  
    Journal article
    2013, Solid-State Electronics, 87, p.11-16
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    Correlation between the Vth-adjustment of nMOSFETs with HfSiO gate oxide and the energy profile of high-k bulk trap density

    Sahhaf, Sahar  
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    Degraeve, Robin  
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    Srividya, Vidya
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    Kaczer, Ben  
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    Gealy, Dan
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    Horiguchi, Naoto  
    Journal article
    2010, IEEE Electron Device Letters, (31) 4, p.272-274
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    Device architectures and their integration challenges for 1x nm node: FinFETs and high mobility channel

    Horiguchi, Naoto  
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    Zschaetzsch, Gerd
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    Sasaki, Yuichiro
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    Kambham, Ajay Kumar
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    Togo, Mitsuhiro
    Proceedings paper
    2012-09, International Conference on Solid State Devices and Materials - SSDM, 25/09/2012
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    Electrode process dependent NBTI chracteristics of TiN gate FinFETs

    Kim, Jinju
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    Cho, Moon Ju
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    Pantisano, Luigi
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    Chiarella, Thomas  
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    Togo, Mitsuhiro
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    Horiguchi, Naoto  
    Proceedings paper
    2012-04, IEEE International Reliability Physics Symposium - IRPS, 15/04/2012, p.GD 6.1
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    Heated implantation with amorphous carbon CMOS mask for scaled FinFETs

    Togo, Mitsuhiro
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    Sasaki, Yuichiro
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    Zschaetzsch, Gerd
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    Boccardi, Guillaume  
    Proceedings paper
    2013, Symposium on VLSI Technology, 11/06/2013, p.T196-T197
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    Heated implantation with amorphous carbon CMOS mask for scaled FinFETs

    Togo, Mitsuhiro
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    Sasaki, Yuichiro
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    Zschaetzsch, Gerd
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    Boccardi, Guillaume  
    Proceedings paper
    2013, Symposium on VLSI Technology - VLSIT, 10/06/2013, p.196-197
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    High performance n-mos FinFET by damage-free, conformal extension doping

    Zschaetzsch, Gerd
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    Sasaki, Y.
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    Hayashi, S.
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    Togo, Mitsuhiro
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    Chiarella, Thomas  
    Proceedings paper
    2011, IEEE International Electron Devices Meeting - IEDM, 5/12/2011, p.841-844
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    Impact of single charged gate oxide defects on the performance and scaling of nanoscaled FETs

    Franco, Jacopo  
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    Kaczer, Ben  
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    Toledano Luque, Maria
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    Roussel, Philippe  
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    Mitard, Jerome  
    Proceedings paper
    2012, International Reliability Physics Symposium - IRPS, 15/04/2012, p.5A-4
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    Impact of the substrate orientation on CHC reliability in n-FinFETs – separation of the various contributions

    Tallarico, Andrea N.
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    Cho, Moon Ju
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    Franco, Jacopo  
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    Ritzenthaler, Romain  
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    Togo, Mitsuhiro
    Journal article
    2014, IEEE Transactions on Device and Materials Reliability, (14) 1, p.52-56
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    Impact of through silicon via induced mechanical stress on fully depleted bulk FinFET technology

    Guo, Wei  
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    Van der Plas, Geert  
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    Ivankovic, Andrej
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    Cherman, Vladimir  
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    Eneman, Geert  
    Proceedings paper
    2012, International Electron Devices Meeting - IEDM, 10/12/2012, p.18.4
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    Improved sidewall doping with small implant angle by AsH3 Ion assisted deposition and doping process for scaled NMOS Si bulk FinFETs

    Sasaki, Yuichiro
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    Godet, Ludovic
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    Chiarella, Thomas  
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    Brunco, David
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    Rockwell, Tyler
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    Lee, Jae Woo
    Proceedings paper
    2013, International Electron Devices Meeting - IEDM, 9/12/2013, p.542-545
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    Ion-implantation-based low-cost Hk/MG process for CMOS low-power application

    Ortolland, Claude
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    Sahhaf, Sahar  
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    Srividya, Vidya
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    Degraeve, Robin  
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    Saino, Kanta
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    Kim, Chul-Sung
    Proceedings paper
    2010, IEEE Symposium on VLSI Technology, 15/06/2010, p.185-186
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    Junction strategies for 1x nm technology node with FINFET and high mobility channel

    Horiguchi, Naoto  
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    Zschaetzsch, Gerd
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    Sasaki, Yuichiro
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    Kambham, Ajay Kumar
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    Douhard, Bastien  
    Proceedings paper
    2012, 12th International Workshop on Junction Technology - IWJT, 14/05/2012, p.216-221
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    Low-frequency noise assessment of the transport mechanisms in SiGe channel bulk FinFETs

    Romeo, Tommaso
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    Pantisano, Luigi
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    Simoen, Eddy  
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    Krom, Raymond
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    Togo, Mitsuhiro
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    Horiguchi, Naoto  
    Proceedings paper
    2012, 42nd European Solid-State Device Research Conference - ESSDERC, 18/09/2012, p.330-333
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    Negative Bias Temperature Instability (NBTI) in p-FinFETs with 45-degree substrate rotation

    Cho, Moon Ju
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    Ritzenthaler, Romain  
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    Krom, Raymond
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    Higuchi, Yuichi
    ;
    Kaczer, Ben  
    Journal article
    2013, IEEE Electron Device Letters, (34) 10, p.1211-1213
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