Browsing by Author "Mitsuhashi, Riichirou"

45nm LSTP FET with FUSI gate on PVD-HfO2 with excellent drivability by advanced PDA treatment

A Dy2O3-capped HfO2 dielectric and TaCx-based metals enabling low-Vt single-metal-single-dielectric gate stack

Achieving 9ps unloaded ring oscillator delay in FuSI/HfSiON with 0.8 nm EOT

Achieving low VT Ni-FUSI CMOS via lanthanide incorporation in the gate stack

Achieving low-VT Ni-FUSI CMOS via Lanthanide incorporation in the gate stack

CMOS integration of dual work function phase controlled Ni FUSI with simultaneous integration of nMOS (NiSi) and pMOS (Ni-rich silicide) gates on HfSiON

Current status and addressing the challenges of Hf-based gate stack toward 45nm-LSTP application

Defect profiling and the role of nitrogen in lanthanum oxide-capped high-k dielectrics for nMOS applications

Demonstration of metal-gated low Vt n-MOSFETs using a Poly-Si/TaN/Dy2O3/SiON gate stack with a scaled EOT value

Low VT CMOS using doped Hf-based oxides, TaC-based metals and laser-only anneal

Low Vt Ni-FUSI CMOS technology using a DyO cap layer with either single or dual Ni-phases

Ni-FUSI on high-k as a candidate for 65nm LSTP CMOS

Nitrogen profile and dielectric cap layer (Al2O3, Dy2O3, La2O3) engineering on Hf-silicate

Optimization of HfSiON using a design of experiment (DOE) approach

Oxygen-vacancy-induced Vt shift in La-containing devices

Prospect of Hf-based gate dielectric by PVD with FUSI gate for LSTP application

PVD-HfSiON gate dielectrics with Ni-FUSI electrode for 65nm LSTP application

Reliability study of La2O3 capped HfSiON high-permittivity n-type metal-oxide-semiconductor field-effect transistor devices with tantalum-rich electrodes

Strain enhanced FUSI/HfSiON technology with optimized CMOS process window

Strain enhanced Low-VT CMOS featuring La/Al-doped HfSiO/TaC and 10ps invertor delay